Perhaps Steve may consider using an ASRC like the one I suggested in the synchro-mesh thread? Considering the per unit (chip) costs are the same and there is >30dB to be had, it may be a good idea.
There could be a case for his synchro-mesh unit, one where audiophiles own older, previously high performing, expensive 32-48KHz standalone 16-18 bit D/As from the RBCD transport/dac era. I can see there may be justification to consider such a device in that situation and I think that should be considered perhaps before a wholesale dismissal.
It should be mentioned and corrected in this context, that Sony, from their very first separate transport/ D/A converter, the CDP-1/DAS-R1, recognized the issue with the possible future use of external D/A converters and designed a synchronized (clock sent to DAC and slaved) connection to the D/A converter. It's certainly not a 'poor design decision'.
See picture below:
View attachment 23748
Twin PLLs used by other manufacturers, along with much improved transports, FIFO buffering and more robust CIRC implementations meant 'slaved' connections were deemed unnecessary.
What the originators could not foresee, was the endless, and in my opinion, futile obsession with ever increasing sample rates and bit depths.
I have to agree with Amir on this one. Whilst a range of manufacturers implemented separate clock mechanisms to feed back to the transport (my old Tag Mclaren kit did) and improved PLL mechanisms and ASRC have essentially solved the problem, it was still a fundamentally bad decision to use an embedded transport sourced clock for the DAC chip. Sample rates arent really relevant to this point.
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